HSINCHU, April 24, 2025 /PRNewswire/ — M31 Technology Corporation (M31), a global provider of silicon intellectual property (IP), today announced that its eUSB2 PHY IP has achieved silicon-proven status on TSMC’s 3nm process and has successfully completed tape-out on TSMC’s 2nm process. As a member of TSMC Open Innovation Platform^® (OIP) IP Alliance since 2012, M31 has been honored with TSMC OIP Partner of the Year Award for seven consecutive years. In 2020, M31 pioneered its eUSB2 IP solution on the TSMC 7nm process node, further solidifying its leadership in advanced interface IP development. Since then, M31 has steadily expanded its eUSB2 IP portfolio across TSMC’s 5nm, 3nm, and most recently, 2nm process technologies—closely aligning with TSMC’s cutting-edge roadmap to accelerate the adoption of AI-enabled smart devices. Looking ahead, M31 is actively developing the next-generation eUSB2 Version 2.0 (eUSB2V2) PHY IP, with ongoing efforts focused on both TSMC’s 3nm and 2nm process nodes.

Reinforcing its robustness and reliability on advanced nodes, M31’s eUSB2 IP solutions have been widely adopted by leading global companies in high-end smartphone chipsets and AI-driven image processing applications. Building on this success, M31 is currently advancing the development of eUSB2V2 IP on TSMC’s N3 and N2 process technologies – expanding its comprehensive eUSB2 portfolio to include eUSB2 V1, V2 PHY, and eUSB2 Repeater solutions. Leveraging the eUSB2 standard, eUSB2V2 enhances data transfer rates while maintaining a low-voltage interface and leveraging asymmetric bandwidth technology—allowing TX and RX to operate at different data rates. This significantly improves transmission efficiency, making it ideal for embedded applications such as AI edge computing, smart surveillance, and image processing chips. To accommodate diverse design needs, eUSB2V2 leverages and enhances the I/O architecture based on the eUSB2 standard, supporting data transfer speeds from 480 Mbps up to 4.8 Gbps. The solution delivers a comprehensive eUSB2 platform for high-end SoCs—optimizing power efficiency, performance and design flexibility, while maintaining full compatibility with legacy USB 2.0 devices.

At the 2025 TSMC North America Technology Symposium, Scott Chang, CEO of M31, stated: “With a strong track record of successful USB PHY IP development and a long-term commitment to innovation with TSMC, M31’s eUSB2 IP has demonstrated proven silicon success across TSMC’s leading-edge process technologies. M31 is pleased to collaborate closely with TSMC to advance eUSB2 IP innovation, empowering customers to adopt the latest interface protocols for next-generation chip design and accelerated time-to-market.”

“We are pleased to collaborate with M31 in driving IP advancements to enable future products,” said Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC. “We look forward to strengthening our collaboration with OIP partners like M31 by joining forces to fuel innovation in next-generation AI and high-performance computing applications with TSMC’s industry-leading process technologies.”